AT32UC3A364S 带有64KB系统内可编程Flash存储器
MIPS |
91 |
SRAM (Kbytes) |
128 |
Flash (Kbytes) |
64 |
I/O Pins |
110 |
USB |
Hi-Speed + OTG |
External Bus Interface |
Yes |
UART |
4 |
F.max (MHz) |
66 |
Pb-Free Packages |
LQFP 144 TFBGA 144 |
爱特梅尔的AVR. 微控制器有一个RISC 核心运行单周期指令和限制对外在组分的需要的一个明确定义的I/O 结构。内部振荡器, 定时器, UART, SPI, 上拉电阻, 脉冲宽度调制, ADC, 模拟比较器和看门狗定器是AVR 设备里的一些特性。AVR 指令可协调用于减小程序的规模,不论代码是用C 或汇编写的。AVR有内嵌于芯片的系统可编程的Flash和EEPROM, 这是为了优化成本和使产品迅速面向市场的一个理想选择。
The AT32UC3A364S flash microcontroller is designed for exceptionally high data throughput with Hi-Speed USB OTG, SD/ SDIO card, Multi-Level-Cell (MLC) NAND flash with ECC and SDRAM interfaces. Designed with the multi-layered AVR32 databus, 128 KB on-chip SRAM with triple high speed interfaces, and multi-channel Peripheral and memory to memory DMA controller, the AT32UC3A364S offers outstanding data throughput. The device also features a Hi-Fi stereo Audio DAC, and a full duplex multi-channel I2S audio interface.
The AT32UC3A364S features an AES crypto module, capable of 128 to 256-bit AES encryption at speeds of up to 22.8 MBytes/s. Note that export restrictions apply to this variant.
The AT32UC3A3 is a complete System-On-Chip microcontroller based on the AVR32 UC RISC processor running at frequencies up to 66MHz. AVR32 UC is a high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption, high code density and high performance. The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt controller for supporting modern operating systems and real-time operating systems. Higher computation capabilities are achievable using a rich set of DSP instructions.
The AT32UC3A3 incorporates on-chip Flash and SRAM memories for secure and fast access. The Peripheral Direct Memory Access Controller (PDCA) enables data transfers between peripherals and memories without processor involvement. The PDCA drastically reduces processing overhead when transferring continuous and large data streams. The Direct Memory Access controller (DMACA) allows high bandwidth data flows between high speed peripherals (USB, External Memories, MMC, SDIO, ...) and through high speed internal features (AES, internal memories). The Power Manager improves design flexibility and security: the on-chip Brown-Out Detector monitors the power supply, the CPU runs from the on-chip RC oscillator or from one of external oscillator sources, a Real-Time Clock and its associated timer keeps track of the time. The Device includes two sets of three identical 16-bit Timer/Counter (TC) channels. Each channel can be independently programmed to perform frequency measurement, event counting, interval measurement, pulse generation, delay timing and pulse width modulation. 16-bit channels are combined to operate as 32-bit channels.
The AT32UC3A3 also features many communication interfaces for communication intensive applications like UART, SPI or TWI. Additionally, a flexible Synchronous Serial Controller (SSC) and an USB are available. The SSC provides easy access to serial communication protocols and audio standards like I2S. The High-Speed (480MBit/s) USB 2.0 Device interface supports several USB Classes at the same time thanks to the rich Endpoint configuration. The On-The-Go (OTG) Host interface allows device like a USB Flash disk or a USB printer to be directly connected to the processor.
AT32UC3A3 integrates a class 2+ Nexus 2.0 On-Chip Debug (OCD) System, with non-intrusive real-time trace, full-speed read/write memory access in addition to basic runtime control.
AT32UC3A364S 特性
? High Performance, Low Power AVR?32 UC 32-Bit Microcontroller
– Compact Single-Cycle RISC Instruction Set Including DSP Instruction Set
– Read-Modify-Write Instructions and Atomic Bit Manipulation
– Performing 1.49DMIPS/MHz
? Up to 91DMIPS Running at 66MHz from Flash (1 Wait-State)
? Up to 54 DMIPS Running at 36MHz from Flash (0 Wait-State)
– Memory Protection Unit
? Multi-Layer Bus System
– High-Performance Data Transfers on Separate Buses for Increased Performance
– 8 Peripheral DMA Channels (PDCA) Improves Speed for Peripheral
Communication
– 4 generic DMA Channels for High Bandwidth Data Paths
? Internal High-Speed Flash
– 256KBytes, 128KBytes, 64KBytes versions
– Single-Cycle Flash Access up to 36MHz
– Prefetch Buffer Optimizing Instruction Execution at Maximum Speed
– 4 ms Page Programming Time and 8ms Full-Chip Erase Time
– 100,000 Write Cycles, 15-year Data Retention Capability
– Flash Security Locks and User Defined Configuration Area
? Internal High-Speed SRAM
– 64KBytes Single-Cycle Access at Full Speed, Connected to CPU Local Bus
– 64KBytes on the Multi-Layer Bus System
? Interrupt Controller
– Autovectored Low Latency Interrupt Service with Programmable Priority
? System Functions
– Power and Clock Manager Including Internal RC Clock and One 32KHz Oscillator
– Two Multipurpose Oscillators and Two Phase-Lock-Loop (PLL),
– Watchdog Timer, Real-Time Clock Timer
? External Memories
– Support SDRAM, SRAM, NandFlash (1-bit and 4-bit ECC), Compact Flash
– Up to 66 MHz
? External Storage device support
– MultiMediaCard (MMC), Secure-Digital (SD), SDIO V1.1
– CE-ATA, FastSD, SmartMedia, Compact Flash
– Memory Stick: Standard Format V1.40, PRO Format V1.00, Micro
– IDE Interface
? One Advanced Encryption System (AES) for AT32UC3A3256S, AT32UC3A3128S
and AT32UC3A364S
– 256-, 192-, 128-bit Key Algorithm, Compliant with FIPS PUB 197 Specifications
– Buffer Encryption/Decryption Capabilities
? Universal Serial Bus (USB)
– High-Speed USB (480Mbit/s) Device/MiniHost with On-The-Go (OTG)
– Flexible End-Point Configuration and Management with Dedicated DMA Channels
– On-Chip Transceivers Including Pull-Ups
? One 8-channel 10-bit Analog-To-Digital Converter, multiplexed with Digital IOs.
? Two Three-Channel 16-bit Timer/Counter (TC)
? Four Universal Synchronous/Asynchronous Receiver/Transmitters (USART)
– Independent Baudrate Generator, Support for SPI, IrDA and ISO7816 interfaces
– Support for Hardware Handshaking, RS485 Interfaces and Modem Line
? Two Master/Slave Serial Peripheral Interfaces (SPI) with Chip Select Signals
? One Synchronous Serial Protocol Controller
– Supports I2S and Generic Frame-Based Protocols
? Two Master/Slave Two-Wire Interface (TWI), 400kbit/s I2C-compatible
? On-Chip Debug System (JTAG interface)
– Nexus Class 2+, Runtime Control, Non-Intrusive Data and Program Trace
? 110 General Purpose Input/Output (GPIOs)
– Standard or High Speed mode
– Toggle capability: up to 66MHz
? 144-pin TBGA and LQFP
? Single 3.3V Power Supply
AT32UC3A364S 订购型号
AT32UC3A364S 技术支持
- ATMEL 爱特梅尔AVR32 微控制器AT32UC3A364S 数据手册DataSheet 下载. PDF(完整版)
- ATMEL 爱特梅尔AVR32 微控制器AT32UC3A364S 数据手册DataSheet 下载. PDF(简洁版)
- ATMEL 爱特梅尔半导体公司产品线. PDF (编号:Atmel Products)
- Atmel 爱特梅尔AVR32 微控制器简介.PDF
- AVR32UC技术参考手册 .PDF
- AVR32 UC3 USB DFU Bootloader (28 pages, revision A, updated 7/07)
- AVR32架构手册 .PDF
- 相关产品选型( Excel 文档格式)
- ATMEL 爱特梅尔公司全线产品目录. pdf